P-CAD

The file is tokenized by DSNLEXER, which reads left and right parentheses as structural delimiters. Each (keyword …​) block is converted to an XML element node via the XNODE class. Quoted strings become Name attributes on the current node, and unquoted tokens are appended to the node’s text content. The root of the resulting DOM tree is a synthetic www.lura.sk node (an artifact of the parser’s XML construction).

The loader opens the file with windows-1251 character conversion.

Contains fileUnits which specifies the default measurement unit for coordinate and dimension values throughout the file. The parser reads this value and stores it as m_DefaultMeasurementUnit (defaults to mil if absent).

Contains style definitions and component/pattern definitions referenced by the board.

Contains net nodes, each with a Name attribute and one or more node child entries. Each node carries a Name attribute formatted as "compRef pinRef" (space-separated component reference designator and pin name).

The netlist section also contains compInst nodes that associate component instance reference designators with compValue and compRef attributes.

The main board section. Its children are processed in order.

Pattern definitions use patternDef nodes. The multiLayer section containing pads and vias is a direct child of the pattern definition.

Pattern definitions use patternDefExtended nodes. The multilayer section is nested inside patternGraphicsDef children, selected by patternGraphicsNameDef / patternGraphicsNameRef matching.

The parser first searches for patternDef nodes in the library section. If none are found, it searches for patternDefExtended nodes. When placing components, the presence of a patternGraphicsNameRef child in the pattern node indicates new-format behavior. The selected patternGraphicsDef is matched by comparing its patternGraphicsNameDef attribute to the patternGraphicsNameRef from the component placement.

Text property resolution also differs between formats. In new format files, attr nodes for RefDes and Value are searched within the matching patternGraphicsRef section rather than directly within the pattern node.

Standalone pads appear as pad children of multiLayer. Each pad references a padStyleDef from the library by name.

The padStyleDef contains:

Each padShape child contains:

Standalone vias appear as via children of multiLayer. Each via references a viaStyleDef from the library by name.

The viaStyleDef contains holeDiam and one or more viaShape children. Each viaShape has layerNumRef, viaShapeType, shapeWidth, and shapeHeight. The viaShapeType values match the pad shape types listed above.

Via properties parsed from placement context:

All vias are imported as VIATYPE::THROUGH with F.Cu to B.Cu layer pair. The via diameter is taken from the first shape on F.Cu or B.Cu.

line nodes represent straight segments. On copper layers they become PCB_TRACK objects; on non-copper layers they become PCB_SHAPE segments.

Properties: two pt children (start and end), width, optional netNameRef.

Two arc node types are supported:

Both types also read a width child for stroke width. Arcs are imported as PCB_SHAPE objects with SHAPE_T::ARC (or SHAPE_T::CIRCLE for 360-degree arcs).

text nodes carry a Name attribute containing the text string (with \r stripped).

Properties:

pcbPoly nodes define copper polygon regions. They contain pt children forming the outline vertices and an optional netNameRef. On copper layers these are imported as KiCad ZONE objects with high priority (100000) to match P-CAD behavior where polygons do not avoid other copper pours.

On plane-type layers, pcbPoly nodes are treated as cutouts within the automatically generated plane fill polygon.

copperPour95 nodes represent copper fill regions with pour properties.

The outline is read from a pcbPoly child node, or from a pourOutline child in older files. The island child, if present, indicates the pour has fill data. Copper pours are converted to KiCad zones with high priority.

polyCutOut nodes define regions where copper is removed. They contain a pcbPoly child with outline vertices. Since KiCad does not support standalone cutout primitives, these are converted to rule areas with DoNotAllowZoneFills set to true but allowing tracks, vias, pads, and footprints.

polyKeepOut nodes define restricted regions. They contain a pcbPoly child with outline vertices. These are converted to rule areas that prohibit tracks, vias, pads, and zone fills.

Keepouts appear both as children of layerContents and as direct children of multiLayer in the pcbDesign section.

planeObj nodes represent explicit power plane polygon regions. They contain a netNameRef, width, and either a pcbPoly or planeOutline child defining the polygon vertices. These are imported as KiCad zones with low priority (1) to sit beneath signal copper pours.

boardOutlineObj nodes appear on the board layer (layerNumRef 3, mapped to Edge.Cuts). They contain an enhancedPolygon with polyPoint children defining outline vertices. Regular line segments on the board layer also contribute to the board outline.

After collecting all outline points, the importer sorts them by nearest-neighbor distance to form a connected outline polygon.

attr nodes inside layerContents assign text style properties to footprint reference and value fields. An attr with Name="RefDes" applies font properties to the footprint’s reference designator text via textStyleRef.

When layerDef nodes are processed, the importer maps by the uppercased layer name:

Layers not matching any known name are mapped by stackup position. Layer 1 maps to F.Cu, layer 2 maps to B.Cu, and inner layers are assigned sequentially (In1.Cu, In2.Cu, etc.) based on their position in the layersStackup. Layers that cannot be mapped at all default to Dwgs.User.

Each layerDef declares a layerType:

The maximum number of signal layers supported is 32.