Allegro

All object blocks have a fixed layout with version-conditional fields. Blocks are indexed by a m_Key field that serves as a global identifier and stored in a flat hash map.

Most block types form singly-linked lists via a m_Next field containing the key of the next block. The file header contains 22 linked list descriptors with head and tail keys. Walking a list starts from the head key, looks up each block, and follows m_Next until the tail key or zero.

Located at fixed offset 0x1200. Each entry is a 4-byte ID followed by a null-terminated string. String IDs are used throughout the file to reference net names, padstack names, reference designators, and other text.

The first 4 bytes of the file are a magic number. The importer masks the lower byte to determine the format version.

Rotation values are stored in millidegrees (divide by 1000 to get degrees). The rotation is not negated despite the Y-axis flip.

Pad rotation in 0x0D PAD blocks is board-absolute, meaning it includes the parent footprint’s rotation. For KiCad, which expects footprint-local pad rotation, the importer subtracts the footprint’s rotation.

Each copper layer has multiple component entries.

The number of fixed slots varies by version: 10 for pre-V172, 21 for V172+.

Pre-V172 (10 fixed):

V172+ (21 fixed):

The drill field location is version-dependent.

Allegro stores slot drill dimensions as (primary, secondary) rather than (X, Y). The primary dimension is always the larger value regardless of pad orientation. The importer corrects this by comparing the first copper layer’s pad aspect ratio with the drill aspect ratio. If they disagree on orientation, the drill dimensions are swapped.

The thermal relief component stores the outer extent of the thermal pattern. The thermal gap is derived from the difference between antipad and pad sizes.

0x28 shapes appear in two distinct contexts.

BOUNDARY class shapes on the m_LL_Shapes header linked list are zone outlines. These are imported as ZONE objects.

ETCH class shapes reachable from NET blocks via the net assignment chain include both zone outlines repeated as copper shapes and actual computed fills. The importer matches fills to zones by net code, layer, and bounding box overlap, then applies genuine fills via SetFilledPolysList(). Unmatched fills serve as a fallback for zone net resolution.

Standalone copper polygons (ETCH shapes with no corresponding BOUNDARY zone) are imported as filled PCB_SHAPE objects with appropriate net assignment.

On V172+ boards, the m_Unknown2 field in 0x28 blocks discriminates dynamic copper. Bit 12 (0x1000) marks shapes that Allegro auto-generated.

Shapes with bit 12 set are imported as KiCad teardrop ZONE objects. After creation, the importer finds the anchoring pad or via for each teardrop by checking which pad or via position on the same net and layer falls within the teardrop outline.

To find the net for a BOUNDARY shape, the importer follows this pointer chain:

A template shared by multiple placed instances. Contains the library symbol path and bounding box coordinates.

An actual footprint on the board.

Bottom-layer footprints are flipped after all children (graphics, text, pads) are added so that child layers and positions are mirrored correctly.

Text objects associated with footprints are classified by their layer class.

High-valued subclass codes (>= 0xEA) have fixed meanings. Low values are indices into per-class custom layer lists from the header’s layer map.

Non-standard layer combinations are assigned to custom layers created during import.

For ETCH class, the subclass value is a zero-based index into the copper layer stackup. Index 0 is the top layer and index N-1 is the bottom layer.

Each 0x1D block contains per-copper-layer records of 56 bytes (14 consecutive int32 values in internal units).

Pre-V172 boards have a shifted field layout with line width at f[0] and no dedicated clearance field. The importer uses spacing (f[1]) as the clearance fallback.

Each NET may have a field with code 0x1a0 whose value is a string table key matching the constraint set name. Nets without this field implicitly use the DEFAULT constraint set.

The constraint import runs in three passes:

NET.m_MatchGroupPtr chains to a 0x2C TABLE naming the match group. The pointer path is version-dependent: V172+ boards use an intermediate 0x26 block, while pre-V172 boards point directly to the 0x2C TABLE.

Groups with exactly 2 nets are imported as differential pair netclasses. Groups with more nets are imported as match group netclasses.